The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 07, 2003

Filed:

May. 09, 2002
Applicant:
Inventors:

Koji Nii, Tokyo, JP;

Shoji Okuda, Hyogo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 8/00 ; G11C 1/100 ;
U.S. Cl.
CPC ...
G11C 8/00 ; G11C 1/100 ;
Abstract

A semiconductor memory includes a first inverter, a second inverter and a read circuit. The first inverter has its input terminal connected to a first memory node and its output terminal connected to a second memory node. The second inverter is connected in anti-parallel with the first inverter, that is, has its input terminal connected to the second memory node and its output terminal connected to the first memory node. The read circuit includes a first transistor having its gate connected to the first memory node, a second transistor having its gate connected to the second memory node, and a third transistor for connecting the drain of the first transistor and that of the second transistor to a read bit line. The semiconductor memory can improve its soft error resistance without increasing the number of steps of the manufacturing process.


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