The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 07, 2003

Filed:

May. 31, 2001
Applicant:
Inventor:

Joseph Weiyeh Ku, Palo Alto, CA (US);

Assignee:

Hewlett-Packard Company, Palo Alto, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 1/700 ;
U.S. Cl.
CPC ...
G11C 1/700 ;
Abstract

A high-density low-cost read-only memory circuit is disclosed. Within the memory circuit, a passive device chip, including only passive devices is configured to form a read-only memory array; and an active device chip, having supporting circuitry electrically coupled to the memory array. The passive chip may include amorphous or poly-Silicon diodes; the supporting circuitry may include bit-line, word-line, address decoder; sense amplifier, and output driver circuitry. The memory array may further include a first memory array; and a second memory array, deposited upon the first memory array layer, together forming a three-dimensional multi-layer compact memory circuit. The passive and active chips may be coupled together and encapsulated within a multi-chip module (MCM) package. The MCM package may further include any number of additional passive memory arrays connected to the active chip.


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