The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 31, 2002

Filed:

Aug. 31, 1999
Applicant:
Inventors:

Joseph P. Coyle, Leominster, MA (US);

Garry M. Tobin, Atkinson, NH (US);

Assignee:

Sun Microsystems, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/100 ;
U.S. Cl.
CPC ...
G06F 1/100 ;
Abstract

A bus tuning system is provided for determining the configuration of an electronic device and for testing and tuning a bus system of the electronic device specifically for its configuration, the bus system including a bus interface coupled with a bus characterized by a number of parameters. The system has a mechanism for determining the configuration of the electronic device; a mechanism for injecting a set of stimulus patterns on the bus; a mechanism for collecting information regarding operation of the electronic device corresponding to the stimulus patterns, including information identifying any error resulting from the set of stimulus patterns; a mechanism for comparing the collected information with information corresponding to the configuration of the electronic device; a mechanism for determining, responsive to the comparing mechanism, whether the electronic device is operating within a predetermined set of operating specifications; and a mechanism for adjusting values of one or more of the parameters by varying one or more electronic characteristics of the bus interface in response to a set of digital control signals to obtain a set of operating and signaling parameters of the bus interface that cause the electronic device to operate within the predetermined set of specifications.


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