The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 31, 2002

Filed:

Jun. 27, 2000
Applicant:
Inventor:

Eric S. Noya, Groton, MA (US);

Assignee:

Adaptec, Inc., Milpitas, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/328 ; G06F 1/212 ;
U.S. Cl.
CPC ...
G06F 1/328 ; G06F 1/212 ;
Abstract

A system and method for detecting block(s)of data transferred to a disk array from a host processor system, in which the block(s) have unique, identifiable values or patterns, is provided. A direct memory access (DMA) engine is resident on the bus structure between the host and the disk array, which can be configured as a redundant array of independent disks (RAID). A cache memory is also resident on the bus and is adapted to cache write data from the host under control of a cache manager prior to storage thereof in the disk array. The DMA engine is adapted to detect predetermined patterns of data as such data is transferred over the bus therethrough. Such data can include a series of consecutive zeroes or another repetitive pattern. Based upon predetermined criteria, the DMA instructs the cache manager that an identified repetitive pattern is being transferred, and the cache manager takes appropriate action to optimize the transaction in view of the specific repetitive nature of the block or blocks of data being detected.


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