The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 31, 2002
Filed:
May. 16, 2001
Applicant:
Inventor:
Keita Takahashi, Nara, JP;
Assignee:
Matsushita Electric Co., Ltd., Osaka, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/704 ;
U.S. Cl.
CPC ...
H01L 2/704 ;
Abstract
A nonvolatile semiconductor memory device includes memory cell, charge buildup damage reducer and damage reducer controller. The memory cell includes floating and control gates formed over a semiconductor substrate. The damage reducer is connected to the control gate. The controller is connected to the damage reducer. The damage reducer controls a potential level at the control gate so that the potential level falls within a predetermined voltage range even if charge buildup occurs in the control gate during a metallization process. And the controller allows no current to flow through the damage reducer while the memory cell is being written, read or erased.