The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 31, 2002

Filed:

Jan. 16, 2001
Applicant:
Inventors:

Jürgen Lindolf, Friedberg, DE;

Stefanie Schatt, München, DE;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 2/726 ;
U.S. Cl.
CPC ...
G01R 2/726 ;
Abstract

A circuit configuration for measuring the capacitance of structures in an integrated circuit having a test structure and a reference structure, includes first and second series circuits, each having two transistors connected in series and connected in parallel between supply terminals each providing one supply potential. The test structure is connected to a coupling node of the transistors of the first series circuit. The reference structure is connected to a coupling node of the transistors of the second series circuit. The supply terminals of the series circuits are connected to a controllable voltage source. A voltage-dependent differential capacitance measurement can be carried out on the test structure by using the circuit configuration.


Find Patent Forward Citations

Lindolf, Jürgen. (2002). Circuit configuration for measuring the capacitance of structures in an integrated circuit (U.S. Patent No. 6501283). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6501283

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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