The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 24, 2002

Filed:

Apr. 18, 2001
Applicant:
Inventors:

Roberto Bardelli, Fino Mornasco, IT;

Mario Tarantola, Bareggio, IT;

Assignee:

STMicroelectronics s.r.l., Agrate Brianza, IT;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03M 1/34 ;
U.S. Cl.
CPC ...
H03M 1/34 ;
Abstract

A successive-approximation analog-digital converter including a logic control circuit timed by means of an external clock signal clock. The logic control circuit includes a register containing a first digital signal formed of N bits, which is the product of a first analog-digital conversion. The logic control circuit is suitable for producing a second digital signal formed of N bits through a second analog-digital conversion in N clock cycles. This analog-digital converter converts the second digital signal sent by the logic circuit to a second analog signal. A comparator compares the first analog signal with the second analog signal which has been input to the analog-digital converter. The converter includes a device which enables the increase of the first analog signal in output from the digital-analog converter and in input to the comparator by a preset value (Voffs) when the bit of the first digital signal which corresponds in position to the bit of the second digital signal which must be decided in a clock cycle is zero.


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