Variable capacity semiconductor memory device

Abstract

The invention provides a semiconductor memory capable of realizing an efficient use of a memory area and reducing manufacturing costs. A memory has a memory cell array comprising a matrix of cells for electrically storing data. The memory cell array is divided into a plurality of block areas. Each block area is set to a four-valued area for recording the data as four-valued data or a binary area for recording the data as binary data. On an access to a memory cell (writing or reading of the data), a word line voltage for writing or a sense amplifier for reading is switched in accordance with whether the data to be accessed is the binary data or the four-valued data.