The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 17, 2002

Filed:

Jun. 02, 2000
Applicant:
Inventors:

John Plunkett, San Diego, CA (US);

Travis Evans, San Diego, CA (US);

Mark Perona, San Diego, CA (US);

Robert Wilson, San Diego, CA (US);

Assignee:

Other;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 7/00 ;
U.S. Cl.
CPC ...
H05K 7/00 ;
Abstract

A set of modules from which custom passive backplanes can be assembled coplanarly couple together and are mounted on a rigid base plate which holds them coupled and coplanar. Each module has a plurality of orthogonally oriented card connectors. Preferably there is a CPU module into which is plugged a CPU card from which an ISA and a PCI originates. On one edge of the CPU module is an connector communicating with the ISA bus. This connector is for chaining together one or more ISA modules, each of which expands the ISA bus to three more ISA connectors. On an opposite edge of the CPU module is an connector communicating with the PCI bus. This connector is for chaining together one or more PCI modules, either 32-bit or 64-bit, each of which expands the PCI bus to three more PCI connectors. Power and ground can be jumpered from module to module or can be directly connected to any module.


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