The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 17, 2002
Filed:
Mar. 09, 2001
Yasuhiro Kan, Tokyo, JP;
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Abstract
The input-output buffer circuit is provided with a PMOS transistor and an NMOS transistor which form an output driver which are ordinary MOS transistors instead of high breakdown voltage transistors. A resistor is inserted between drains of those MOS transistors and an external terminal. The resistance of this resistor is such that it generates a voltage drop as to cause a potential of drains of the PMOS transistor and the NMOS transistor not to exceed a voltage which can be safely applied to those MOS transistors and to become a potential which is at least a threshold level of an input buffer, when a current path extending from the external terminal to a power supply terminal through a parasitic diode of the PMOS transistor is formed.