The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 17, 2002

Filed:

Jun. 29, 2000
Applicant:
Inventor:

Jong-Hoon Oh, Fremont, CA (US);

Assignee:

C-Link Technology, Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 1/9173 ;
U.S. Cl.
CPC ...
H03K 1/9173 ;
Abstract

In accordance with an embodiment of the present invention, an integrated circuit includes an input bus configured to receive a plurality of input signals. The input bus extends across a predetermined length of one side of the integrated circuit. The integrated circuit further includes a plurality of logic block circuits coupled to the input bus for receiving one or more of the input signals. Each of the logic block circuits are coupled to at least one of a plurality of destination blocks via a first set of interconnect buses. The logic block circuits are placed along the one side of the die such that the first set of interconnect buses extend substantially orthogonal to the input bus.


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