Method and apparatus for reverse engineering integrated circuits by monitoring optical emission

Abstract

A method and apparatus for reverse engineering an integrated circuit chip (IC chip) ( ) utilizes an electrical circuit tester ( ) for injecting a triggering signal into the IC chip ( ) to exercise a circuit under test. In synchronization thereto, a PICA detector ( ) monitors optical emissions from the circuit under test. A spatial data extractor, electrically coupled to the PICA detector, collects space information ( ) from patterns of light emissions emitted by the circuit under test, and a timing data extractor, electrically coupled to the electrical circuit tester and to the PICA detector ( ), collects time information ( ) from the patterns of light emissions emitted by the circuit under test. A database memory ( ) includes known data about the circuit under test and also includes at least one reference pattern for comparing a captured light emission pattern thereto to identify at least one circuit element in the circuit under test. A PICA data analyzer ( ), electrically coupled to the database memory ( ) and to the PICA detector ( ), determines at least one of whether the circuit under test comprises a circuit element with a light emission pattern that matches one of the at least one reference pattern in the database memory ( ), and the value contained in a memory in the IC chip ( ).