The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 10, 2002

Filed:

Jan. 19, 1999
Applicant:
Inventors:

Naomi Yamazaki, Kanagawa, JP;

Ryoetsu Nakajima, Kanagawa, JP;

Masumi Fujino, Kanagawa, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/342 ;
U.S. Cl.
CPC ...
G06F 1/342 ;
Abstract

A bus control device having a plurality of devices such as a processor or a DMAC which can be a bus master accessing a system bus. When the processor transfers data to a memory or a processing circuit, a system bus controller for the processor and a system bus controller for the memory or a system bus controller for the processing circuit access the system bus within an accessible minimum time with each of input/output signals. When the DMAC transfers data to the memory or the processing circuit, a system bus controller for the DMAC and the system bus controller for the memory or the system bus controller for the processing circuit access the system bus within the accessible minimum time with each of the input/output signals.


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