The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 10, 2002
Filed:
Jan. 07, 2000
Bernard J. Pappert, Austin, TX (US);
Roger A. Whatley, Georgetown, TX (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
Buffering circuitry ( ) uses pull-up slew rate control circuitry ( ) and pull-down slew rate control circuitry ( ) to control the rising and falling slew rates of an output signal ( ) provided by buffering circuitry ( ). Pull-up slew rate control circuitry ( ) and pull-down slew rate control circuitry ( ) may be used in an embodiment of buffering circuitry ( ) which provides a higher output voltage VHIGH than the standard power voltage VPOWER which is used to power most of the circuitry. Buffering circuitry ( ) utilizes distributed resistive elements ( ) to provide improved electrostatic discharge protection. Buffering circuitry ( ) utilizes a low power level shifter ( ). Voltage reference generation circuitry ( ) may be used to provide a stable low power reference voltage VREF ( ).