The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 03, 2002
Filed:
Oct. 22, 1999
Marc Delvaux, Eatontown, NJ (US);
Ronen Habot, Eatontown, NJ (US);
GlobespanVirata, Inc., Red Bank, NJ (US);
Abstract
In general, a system and method for implementing DSL support for use by a computer having a PCI bus is disclosed. A DSL modem is allowed to simultaneously communicate data to and from the computer. In a simplified embodiment, a DSL enabling device provides both data flow control and general control functions of the DSL modem. The DSL enabling device comprises a PCI DMA arbitrator, which determines the status of a temporary memory module in response to either a transmit request from a transmit control unit or a receive request from a receive control unit, thereby arbitrating between the two control units in order to access the temporary memory module. A read/write register specifies priority between the transmit control unit and the receive control unit, as well as specifying computer memory addresses to write to and setting memory cell length. A transmit RAM temporarily stores data from the computer to the DSL modem until such time as the DSL modem instructs the transmit control unit that the DSL modem is ready to receive the data. A receive RAM temporarily stores data from the DSL modem for transmission to the computer memory until such time that the PCI DMA arbitrator instructs the receive control unit that the temporary memory module is ready to receive such data after which time a single channel DMA transfers the data from the temporary memory module to the computer.