The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 26, 2002
Filed:
Jun. 30, 2000
Jose M. Marquez, Mountain View, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
Method and apparatus for routing input signals having different voltage requirements in a PLD circuit design. In various example embodiments, the input signals are grouped into logical clusters, wherein the input signals in each logical cluster have a common input voltage standard. Input pins of the device are grouped into physical clusters, wherein each physical cluster is associated with a voltage standard. Each of the physical clusters is paired with a logical cluster and has associated therewith one or more programmable logic elements as determined by the input signals to be routed to the programmable logic elements. For each paired logical cluster and physical cluster, the input signals of the logical cluster are routed from the pins of the physical cluster to the programmable logic elements of the physical cluster.