The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 26, 2002

Filed:

May. 12, 1998
Applicant:
Inventors:

Michael McNamara, Santa Clara, CA (US);

Chong Guan Tan, Saratoga, CA (US);

Chiahon Chien, Saratoga, CA (US);

David Todd Massey, Boulder Creek, CA (US);

Assignee:

Verisity Design, Inc., Mountain View, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/750 ;
U.S. Cl.
CPC ...
G06F 1/750 ;
Abstract

To identify a finite state machine and verify a circuit design, the invention identifies, in a design description, a set of constructs, a construct in the set of constructs, and an object in the construct. It next identifies a first subset of constructs in the set of constructs which can control a change of a value of the object, and then identifies a second subset of constructs whose values can be changed directly or indirectly by the object. The identifying and storing steps are repeated for all objects in the construct and for all constructs in the set of constructs. A finite state machine is identified by searching for a first object which controls a change of a value of a second object and whose value is also changed directly or indirectly by the second object. This method of identifying finite state machine elements in a design description is used by a test generator which then generates test vectors for exercising the finite state machine elements on a test bench.


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