The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 26, 2002
Filed:
Oct. 25, 2000
James H. Jackson, Cary, NC (US);
Michael W. Kleeman, Sudbury, MA (US);
Georges Melhem, Salem, NH (US);
Sanjeev Mohindra, Andover, MA (US);
Assabet Ventures, Maynard, MA (US);
Abstract
An SIMD array processor having a scalable and flexible architecture. The SIMD array architecture includes an array of processing elements, a plurality of processor controllers, and at least one other computer system. A system area network interconnects at least one user computer with the processor controllers and the computer system; and, a storage area network interconnects at least one storage device with the processor controllers and the computer system. The SIMD array architecture is adapted to allow different user computers to use different portions of the array of processing elements and/or different processor controllers and computer systems simultaneously. The array of processing elements has a hierarchical structure comprising backplanes, PCB's, ASIC's, and arrays of processing elements. The SIMD array architecture can be scaled by increasing the quantity of backplanes, PCB's, ASIC's, and/or by increasing the size of the arrays of processing elements. The SIMD array architecture can also be flexibly modified to achieve arrays of processing elements with different aspect ratios by selectively accessing data paths interconnecting the processing elements.