The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 26, 2002

Filed:

Oct. 11, 2001
Applicant:
Inventor:

David Kwong, Fremont, CA (US);

Assignee:

Pericom Semiconductor Corp., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 3/01 ;
U.S. Cl.
CPC ...
H03K 3/01 ;
Abstract

A substrate bias generator has a ring oscillator disabled when a supply over-voltage condition is detected by a supply comparator, or when a target substrate voltage is reached. A substrate comparator compares the substrate voltage to a reference generated by a p-channel sense transistor that is independent of the substrate voltage. The substrate is sensed by an n-channel sense transistor with only its bulk connected to the substrate voltage. Current sources for the sense transistors and comparator are controlled by bias voltages generated by a voltage divider that switches from a high-power state to a low-power state once the substrate target is reached. Feedback turns off a high-current resistor, limiting current to that passing through a low-current resistor. The bias voltages are adjusted to reduce current to the sense transistors and comparator, reducing power. High current and power are used for fast sensing before the substrate target is reached.


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