Structure and method for a large-permittivity gate using a germanium layer

Abstract

A structure for, and method of forming, a metal-insulator-semiconductor field-effect transistor in an integrated circuit is disclosed. The disclosed method comprises forming a germanium layer on a semiconductor substrate (e.g. silicon ), depositing a large-permittivity gate dielectric (e.g. tantalum pentoxide ) on the germanium layer, and forming a gate electrode (e.g., titanium nitride ) on the gate dielectric. The method may comprise forming source and drain regions in the substrate on either side of the gate dielectric. The germanium layer, which is preferably epitaxially grown, generally prevents formation of a low dielectric constant layer between the gate dielectric and the semiconductor substrate. The disclosed structure comprises a germanium layer disposed on a semiconductor substrate (e.g. silicon ), a large-permittivity gate dielectric (e.g. tantalum pentoxide ) disposed on the germanium layer, and a gate electrode (e.g., titanium nitride ) disposed on the gate dielectric. The structure may comprise source and drain regions disposed in the substrate on either side of the gate dielectric. A Ge Si buffer layer may be formed between the semiconductor substrate and the germanium layer, with x transitioning from about 0 near the substrate to about 1 near the germanium layer. The large-permittivity gate dielectric may be either a moderate-dielectric constant oxide or a high-dielectric constant oxide.