The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 26, 2002

Filed:

Mar. 23, 2000
Applicant:
Inventors:

Stephen Keetai Park, Austin, TX (US);

Jeffrey A. Shields, Sunnyvale, CA (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/972 ;
U.S. Cl.
CPC ...
H01L 2/972 ;
Abstract

An integrated circuit is designed to reduce charge gain and charge loss in a flash memory or flash programmable read-only memory. Charge gain and loss caused by moisture or hydrogen diffusion or alternately small contact-to-floating gate distance is reduced by a capping layer disposed over a gate stack and a base layer of the flash memory. The capping layer includes a buffer layer, a first insulative layer, and a second insulative layer. The etch characteristics of at least the first and second insulative layer differs from an interlevel dielectric to control the dimensions of a contact extending through the interlevel dielectric and the capping layer to the base layer.


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