The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 26, 2002

Filed:

Mar. 15, 2002
Applicant:
Inventors:

Chan-Hwa Jung, Gyeonggi-do, KR;

Sung-Min Cho, Gyeonggi-do, KR;

Youn-Jin Oh, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/14763 ; H01L 2/144 ;
U.S. Cl.
CPC ...
H01L 2/14763 ; H01L 2/144 ;
Abstract

Disclosed is a method for forming copper interconnections of a semiconductor component using an electroless plating system, which enables copper to be grown only in corresponding interconnection regions. In such a method, a wafer is cleaned, the wafer is pretreated with a metal seed solution so as to cause spontaneous catalytic activation and simultaneously the process temperature is varied to grow metal seed particles from the metal seed pretreating solution, the wafer is cleaned to remove the metal seed from the wafer surface, and the wafer is finally plated with an electroless plating bath to grow copper in the metal seed formed regions. This method simplifies the processes and reduces process costs by substituting a wet process for the existing vacuum pretreating process. Also, a wafer planarization process can be omitted by selectively growing copper only in desired interconnections. Compared with the existing ultraviolet radiation photo process, the selective copper growth process of the method has an advantage of being much simpler.


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