The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 19, 2002

Filed:

Oct. 05, 1998
Applicant:
Inventors:

Peter K. Yu, Sunnyvale, CA (US);

Michael D. Rostoker, Boulder Creek, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/900 ;
U.S. Cl.
CPC ...
G06F 1/900 ;
Abstract

An efficient DSP or MPU is combined with efficient DRAM on a single IC die. To optimize the embedded memory, the chip includes wide-band connections to DRAM. Row and column addresses of DRAM can be applied at the same time using wide address busses. Additional metal lines lower the resistance of the word line in the DRAM circuits. For certain process steps, the processor block is masked off and the process steps unique to the fabrication of memory are performed on the memory block, and vice-versa. Process steps which are common to the processor and memory blocks can be performed simultaneously on the processor and memory blocks without masking off either block. Certain process steps can be employed in the fabrication of the one of the two processor and memory blocks in addition to or in lieu of processes normally used in the fabrication of that block. An electronic component (e.g., integrated circuit) incorporating the technique is suitably included in a system or subsystem having electrical functionality, such as general purpose computers, telecommunications devices, and the like.


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