The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 19, 2002

Filed:

Nov. 09, 1998
Applicant:
Inventor:
Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 1/250 ; H04L 1/228 ; H04L 1/256 ; H04Q 1/100 ;
U.S. Cl.
CPC ...
H04L 1/250 ; H04L 1/228 ; H04L 1/256 ; H04Q 1/100 ;
Abstract

An asynchronous transfer mode (ATM) switch ( ) has plural switch ports ( ) connected by respective bidirectional links ( ) to a switch core ( ). Connected to each switch port is a corresponding row column unit ( ), each row column unit managing the writing of service cells to one row of cross point units ( ) and the reading of service cells from one column of cross point units. The bidirectional links between each switch port and its corresponding row column unit of the switch core carry both service cells and control cells. Cells of differing sizes are carried on the bidirectional links between the switch core and the switch ports. Service cells have a differing cell size than the control cells, and the cell size of the service cells need not necessarily be uniform. Differing types of control cells—link connection control (LCC) cells and link synchronization control (LSC) cells are provided. The link connection control cells (LCC) are used e.g., to read and write control data into and from control registers of the switch core. The link connection control cells (LCC) include cells of two formats—a bitmapped format (for reading/writing with respect to bitmapped control registers) and a “coded” format (used for input/output operations for some bitmapped as well as non-bitmapped registers).


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