The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 19, 2002

Filed:

Aug. 22, 2001
Applicant:
Inventors:

Dale J. Durand, Irvine, CA (US);

Quentin P. Herr, Torrance, CA (US);

Mark W. Johnson, La Canada Flintridge, CA (US);

Assignee:

TRW Inc., Redondo Beach, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 1/9195 ;
U.S. Cl.
CPC ...
H03K 1/9195 ;
Abstract

The level of bias current ( ) required by a superconductor integrated circuit ( & ) is lowered by separating the circuit into portions having separate ground planes and supplying the bias current to the circuit portion ( ) in one ground plane in series ( ) with that for the circuit portion ( ) in another ground plane. To maintain DC isolation between those circuit portions, SFQ pulses inputted (SFQ IN) move across the separate ground planes through a pair of inductively coupled SQUIDS ( & ) that define a DC transformer; and a combiner ( ) reconstitutes and outputs the SFQ pulses. To provide inductive coupling the DC transformer includes a primary ( ) and isolated secondary ( ) winding.


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