The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 19, 2002
Filed:
Apr. 24, 2000
Applicant:
Inventors:
David E. Houser, Apalachin, NY (US);
James M. Larnerd, Binghamton, NY (US);
Jeffrey L. Lee, Vestal, NY (US);
Francis S. Poch, Apalachin, NY (US);
Assignee:
International Business Machines Corporation, Armonk, NY (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01R 9/09 ;
U.S. Cl.
CPC ...
H01R 9/09 ;
Abstract
The present invention provides a circuit board having burr free castellated plated through holes. In particular, the leading edge of the plated through hole, that tends to produce burr formation during conventional profiling, is removed or pre-profiled to off-set the leading edge of the plated through hole from a surface of the circuit board.
Houser, David. (2002). Circuit board having burr free castellated plated through holes (U.S. Patent No. 6483046). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6483046
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile