The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 12, 2002

Filed:

Apr. 18, 2000
Applicant:
Inventors:

Pradipto Mukherjee, Austin, TX (US);

Aurobindo Dasgupta, Austin, TX (US);

David T. Blaauw, Austin, TX (US);

David R. Bearden, Austin, TX (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/750 ;
U.S. Cl.
CPC ...
G06F 1/750 ;
Abstract

The invention relates to a new method of guidance for routing of nets in an integrated circuit model wherein all nets are first approximately routed, as with Steiner routing, and victim nets with functional delay noise above predetermined thresholds are identified. Each victim net is then detail routed. For each victim net detail routed, a set of least noise aggressive neighboring nets is selected. Segments of those neighboring nets are assigned tracks adjacent to the victim net in such a way as to maximize utilization of the victim net's neighboring tracks, thereby reducing noise induced on the victim net and maximizing use of available space on the semiconductor. The process is then repeated until there are no additional victim nets, at which point the remaining nets are detail routed.


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