The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 12, 2002
Filed:
Jun. 24, 1999
Balaji V. Virajpet, San Jose, CA (US);
Kaushik L. Popat, Pleasanton, CA (US);
Cirrus Logic, Inc., Austin, TX (US);
Abstract
A memory map for a computer system is configurable. For example a first section of the memory map (e.g., the lower address space) is configurable so that when the process accesses this section, different devices will respond depending on the memory map in effect. In one embodiment, external non-volatile memory is accessed during a first time period based on a reset memory map. After initialization, the memory may is changed to a normal one so that subsequent accesses to the same section of the memory map result in accesses to faster memory (e.g., internal SRAM). In the case where the reset vector and interrupt vectors have relatively close addresses, the configurability of the memory map allows the reset vector to be handled through accesses to non-volatile memory while interrupt vectors are handled through accesses to faster internal SRAM.