The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 12, 2002
Filed:
Nov. 05, 2001
Jung-Ho Lee, Gyeonggi-do, KR;
Dong-Jun Lee, Gyeonggi-do, KR;
Dae-Won Kang, Gyeonggi-do, KR;
Sung-Taek Moon, Gyeonggi-do, KR;
Gi-Hag Lee, Seoul, KR;
Jung-Sik Choi, Gyeonggi-do, KR;
Samsung Electronics Co., Ltd., Kyungki-do, KR;
Abstract
A method of forming a silicon oxide layer of a semiconductor device comprising coating a spin-on glass (SOG) composition including perhydropolysilazane having a compound of the formula (SiH NH ) where n represents a positive integer on a semiconductor substrate having a surface discontinuity, to form a planar SOG layer; and forming a silicon oxide layer with a planar surface by implementing a first heat treatment to convert an SOG solution into oxide and a second heat treatment to densify thus obtained oxide. The silicon oxide layer of the present invention can bury a gap between gaps of VLSI having a high aspect ratio and gives the same characteristics as a CVD oxide layer. Further, the oxidation of silicon in the active region is restrained in the present invention to secure dimension stability. Also disclosed is a semiconductor device made by the method.