The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 12, 2002
Filed:
Nov. 06, 2000
Hyung Ki Kim, Kyoungki-do, KR;
Abstract
The present invention discloses a method for fabricating a SOI wafer. The method for fabricating the SOI wafer of the present invention, comprising the steps of: preparing a semiconductor substrate and a base substrate; forming a pad oxide layer, a nitride layer and a mask oxide layer in sequence on one surface of the semiconductor substrate; etching the pad oxide layer, the nitride layer, and the mask oxide layer to expose an isolation region of the semiconductor substrate; forming a trench by etching the exposed semiconductor substrate region; removing the mask oxide layer; forming a field oxide layer having bird's-beak at the edge thereof by oxidizing the low surface of the trench; removing the field oxide layer; forming an isolation layer of trench type to fill the oxide layer into the trench; removing the nitride layer and the pad oxide layer; depositing a first insulating layer on the isolation layer and the semiconductor substrate; depositing a second insulating layer on the base substrate; bonding the semiconductor substrate and the base substrate to form a contact of the first insulating layer with the second insulating layer; polishing the surface of the semiconductor substrate using the isolation layer as a polishing stopper; and further polishing the surface of the semiconductor substrate to expose the bird's beak and to form a semiconductor layer of a desired thickness.