The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 05, 2002

Filed:

Jun. 01, 1998
Applicant:
Inventor:

John C. Thomas, Sunnyvale, CA (US);

Assignee:

Nvidia U.S. Investment Company, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/750 ;
U.S. Cl.
CPC ...
G06F 1/750 ;
Abstract

Macrocells, e.g., Random Access Memory (“RAM”), are arranged in columns and disposed in a core of an integrated circuit (IC) chip. The macrocells can abut each other within the columns or can be separated from each other by standard cells which are disposed to fill gaps between the macrocells within the columns. Power/ground rails are disposed vertically along the sides of the columns. The power/ground rails run the full height of the core and couple to a power/ground ring disposed along the perimeter of the core. The power/ground rails also couple to the macrocells and the standard cells and provide power to those cells. The columns can form right angles with horizontal standard cell rows, thus enabling the standard cells to couple easily to the vertically disposed power/ground rails.


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