The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 05, 2002
Filed:
Feb. 24, 1999
Applicant:
Inventors:
Brian Ji, Fishkill, NY (US);
Toshiaki Kirihata, Poughkeepsie, NY (US);
Dmitry Netis, Beacon, NY (US);
Assignee:
International Business Machines Corporation, Armonk, NY (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/300 ; G06F 1/10 ; G11C 1/1413 ;
U.S. Cl.
CPC ...
G06F 1/300 ; G06F 1/10 ; G11C 1/1413 ;
Abstract
A memory structure comprises a plurality of banks (each of the banks including a plurality of blocks) a plurality of timing critical address lines connected to all of the blocks in respective ones of the banks (a number of the critical address lines being equal to a number of the banks), and a plurality of dedicated address lines connected to respective ones of the blocks.
Ji, Brian. (2002). Hierarchical row activation method for banking control in multi-bank dram (U.S. Patent No. 6477630). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6477630
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile