The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 05, 2002
Filed:
Jul. 27, 2000
Applicant:
Inventors:
Chizuru Inoshita, Tokyo, JP;
Kazuo Aoki, Tokyo, JP;
Assignee:
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G04F 1/000 ; H03K 1/900 ; G01R 3/128 ;
U.S. Cl.
CPC ...
G04F 1/000 ; H03K 1/900 ; G01R 3/128 ;
Abstract
In a semiconductor integrated circuit, a monitor circuit for evaluation is provided on a semiconductor substrate in an input/output buffer circuit region. This monitor circuit includes a delay circuit, a first flip-flop circuit on the input side of the delay circuit, and a second flip-flop circuit on the output side of the delay circuit.
Inoshita, Chizuru. (2002). Semiconductor integrated circuit (U.S. Patent No. 6477115). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6477115
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile