The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 05, 2002
Filed:
Sep. 06, 2001
Koichi Yokomizo, Tokyo, JP;
Oki Electric Industry Co., Ltd., Tokyo, JP;
Abstract
The invention provides a semiconductor integrated circuit wherein a PMOS having a high threshold voltage is installed between a VDD line and a VDDV line , and a NMOS having a high threshold voltage is installed between a VSS line and a VSSV line . The semiconductor integrated circuit comprises a logic gate circuit supplied with a power source voltage via the VDDV line and the VSSV line , respectively, and made up of PMOSes to , and NMOSes to . A substrate terminal of the PMOSes to , respectively, is connected to a pad to which a suitable voltage can be supplied from outside while a substrate terminal of the NMOSes to , respectively, is connected to a pad to which a suitable voltage can be supplied from outside. The semiconductor integrated circuit with such a configuration is capable of improving a failure detection ratio at testing.