The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 29, 2002

Filed:

Feb. 25, 2000
Applicant:
Inventor:

Masayuki Ikeda, Kawasaki, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/300 ;
U.S. Cl.
CPC ...
G06F 1/300 ;
Abstract

A cache memory control apparatus provided to prevent necessary data from being ejected from hierarchical cache memories and to avoid conflicts of process in the main pipeline of a processing unit (arithmetic unit), even when prefetch commands are issued at high frequency. The apparatus includes a command control section to issue a prefetch command instruction that speculative data is to be fetched (prefetched) from a main storage unit into a plurality of hierarchically arranged cache memories, and a prefetch control section to changeably select at least one of the hierarchically arranged cache memories as a destination to receive prefetch data when the prefetch command issued from the command control section is executed, according to at least one of status information of one of the cache memories and a type or kind of prefetch. The apparatus is particularly useful when applied to a computer system of the type having a prefetch operation.


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