The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 29, 2002

Filed:

May. 11, 1999
Applicant:
Inventors:

Akira Nakamatsu, Kanagawa, JP;

Takao Abe, Tokyo, JP;

Nobuo Nakamura, Kanagawa, JP;

Assignee:

Sony Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/300 ;
U.S. Cl.
CPC ...
G06F 1/300 ;
Abstract

A digital signal processing apparatus for processing a plurality of video signals and a plurality of audio signals is provided, and comprises a computer comprising a system bus and a main CPU connected to the system bus and an extension processor comprising a plurality of signal processing circuits for processing the plurality of video signals and/or the plurality of audio signals, and a local CPU for controlling the plurality of signal processing circuits so as to allow for the processing of the video signals and audio signals in real time. The extension processor further comprises an extension system bus extended from the system bus, a digital audio video (DAV) bus for transmitting the plurality of video signals and the plurality of audio signals between the plurality of signal processing circuits and a local CPU bus for transmitting control signals outputted from the local CPU. Each processing circuit has a common interface which is capable of being connected to the extension system bus, the DAV bus and the local CPU bus in any position, thereby allowing for the processing of the video signals and audio signals regardless of the mounting positions of the processing circuits.


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