The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 29, 2002
Filed:
Jan. 04, 1999
Applicant:
Inventor:
Sampath H. Kumar, San Jose, CA (US);
Assignee:
Cisco Technology, Inc., San Jose, CA (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04J 3/14 ;
U.S. Cl.
CPC ...
H04J 3/14 ;
Abstract
An apparatus is described to implement a module redundant system using logical addresses. The apparatus may comprise a bus on which a plurality of server modules may be coupled to. One of the server modules may be configured to be active and remaining server modules may be configured to be on standby. A plurality of client modules may be coupled to the bus and configured to be in communication with the active server module using logical addresses.
Kumar, Sampath. (2002). Use of logical addresses to implement module redundancy (U.S. Patent No. 6473396). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6473396
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile