The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 29, 2002

Filed:

Sep. 27, 2001
Applicant:
Inventors:

Toshiya Fujiyama, Tenri, JP;

Masanori Inamori, Tenri, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 3/315 ;
U.S. Cl.
CPC ...
H02M 3/315 ;
Abstract

A phase control circuit which can stabilize voltage control when used in a switching regulator, and a switching regulator using such a phase control circuit are provided. A switching circuit for generating a first and a second output signals having opposite polarities based on a clock signal, is provided. A PWM latch circuit, reset by a reset signal, for generating a third and a fourth output signals which have phases controlled with respect to the first and the second output signals respectively by a set signal produced based on a control signal and come to have opposite polarities, is provided. A delay circuit for delaying the rising of each of the first through the fourth output signals before outputting each of the first through the fourth output signals is provided for each output signal. A delay clock pulse width setting circuit for generating a delay pulse based on low level periods of the delayed first and second output signals is provided so as to reset the PWM latch circuit using the delay pulse as the reset signal.


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