The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6472911 B1

PDF
Full Text
Expired
Date of Patent:
Oct. 29, 2002

Filed:

Oct. 30, 2001
Applicant:
Inventor:

Akihiro Sushihara, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03B 1/00 ; H03K 3/00 ;
U.S. Cl.
CPC ...
H03B 1/00 ; H03K 3/00 ;
Abstract

An output buffer circuit for a logical integrated circuit in which the peak value of switching noise is small thereby reducing the possibility of malfunctions. A main driver has first and second transistors. The first transistor increases and decreases the current flowing between a signal output terminal and a first power supply line inversely depending on a first control potential. The second transistor increases and decreases the current flowing between the signal output terminal and a second power supply line depending on a second control potential. A predriver turns on the first and second transistors at a low speed and turns them off at a high speed. As the first and second transistors are turned on at a low speed, the peak value of switching noise is small.


Find Patent Forward Citations

Sushihara, Akihiro. (2002). Output buffer circuit of semiconductor integrated circuit (U.S. Patent No. 6472911). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6472911

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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