The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 29, 2002
Filed:
Oct. 04, 2001
James R. B. Elmer, Vancouver, WA (US);
Eric J. Kirchner, Troutdale, OR (US);
LSI Logic Corporation, Milpitas, CA (US);
Abstract
A method for forming an alignment feature on a substrate. The alignment feature is of the type concurrently formed with an electrically conductive layer overlying an electrically nonconductive layer having vias. The vias are filled with an electrically conductive material, and the alignment feature has a smaller aspect ratio than the vias. The alignment feature is not filled with the electrically conductive material when a first amount of the electrically conductive material, sufficient to just fill the vias, is deposited on the substrate. The first amount of the electrically conductive material within the alignment feature is not sufficient to prevent the alignment feature in the electrically conductive layer from distorting, and thereby reducing the effectiveness of the alignment feature. The improvement is in depositing an additional amount of the electrically conductive material on the substrate. The additional amount is more than the first amount that is just sufficient to fill the vias, and fills the alignment feature to a level sufficient to prevent the alignment feature in the electrically conductive layer from distorting and reducing the effectiveness of the alignment feature.