The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 22, 2002
Filed:
Dec. 14, 2000
Applicant:
Inventors:
Subbu Ganesan, Saratoga, CA (US);
Leonid Alexander Broukhis, Fremont, CA (US);
Ramesh Narayanaswamy, Mountain View, CA (US);
Ian Michael Nixon, Sunnyvale, CA (US);
Assignee:
Tharas Systems, Inc., Santa Clara, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/750 ; G01R 3/13177 ; G01R 3/13181 ; H01L 2/500 ; H03K 1/900 ;
U.S. Cl.
CPC ...
G06F 1/750 ; G01R 3/13177 ; G01R 3/13181 ; H01L 2/500 ; H03K 1/900 ;
Abstract
A functional verification system which provides information as to whether a signal has reached all possible states. For example, in the case of a signal with 0 and 1 as possible states, a 2 bit variable is initialized to 00. When a value of 1 is received for the signal, the first bit is set to 1 and when a value of 0 is received for the signal, the second bit is set to 1. Accordingly, by examining the two bits, one may determine whether the signal has attained one or both of 0 and 1 states.