The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 22, 2002
Filed:
Mar. 08, 2001
Applicant:
Inventors:
Takashi Yamada, Tenri, JP;
Koji Horikawa, Nara, JP;
Assignee:
Sharp Kabushiki Kaisha, , JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/200 ;
U.S. Cl.
CPC ...
G06F 1/200 ;
Abstract
The present invention relates to a FIFO (First In First Out) memory control circuit for controlling FIFO memory which is used in various electronic devices. Specifically, the present invention relates to a FIFO memory control circuit capable of performing asynchronous read/write control hen a write clock and a read clock are different and it is known or determined which of these clocks has a higher clock frequency.
Quick Actions:
Yamada, Takashi. (2002). Fifo memory control circuit (U.S. Patent No. 6470439). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6470439
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile