The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 22, 2002

Filed:

Oct. 30, 1998
Applicant:
Inventors:

Pery Andrew Pearson, El Dorado Hills, CA (US);

George Taylor McDavid, Orangevale, CA (US);

Assignee:

Agilent Technologies, Inc., Palo Alto, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04J 1/500 ;
U.S. Cl.
CPC ...
H04J 1/500 ;
Abstract

A fiber channel interface controller incorporating a cost-efficient hardware implementation of the fiber channel arbitrated loop initialization protocol. Cost efficiency is achieved by determining the minimal buffer size required for storing information extracted from fiber channel arbitrated loop initialization frames and including in the fiber channel interface controller a memory buffer having this calculated minimum size. The inherent buffering capacity within all FC ports of the arbitrated loop and the ability to generate, on the fly, large portions of fiber channel arbitrated loop initialization frames, rather than storing and forwarding entire fiber channel arbitrated loop initialization frames, both combine to decrease the memory buffer size requirements for the fiber channel interface controller and to decrease the time required to carry out fiber channel arbitrated loop initialization. The decreased time required to carry out fiber channel arbitrated loop initialization results in less down time and increased availability of the fiber channel that are import.


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Pearson, Pery. (2002). Fibre channel loop map initialization protocol implemented in hardware (U.S. Patent No. 6470026). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6470026

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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