The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 22, 2002
Filed:
Dec. 24, 1999
John H. Carpenter, Jr., Rowlett, TX (US);
Joseph A. Devore, Richardson, TX (US);
Reed Adams, Plano, TX (US);
Ross Teggatz, McKinney, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
An integrated circuit ( ) having at least one programmable fuse (F ) and ESD circuitry (MN , MN ) preventing the fuse (F ) from being unintentionally blown when a voltage transient exists on a main voltage potential (V ). The ESD circuitry preferably comprises of MOSFET switches which are coupled to turn on quicker than a main fuse programming switch (MN ) due to the voltage transient, thereby insuring that the main switch remains off during the voltage transient to prevent the unintentional blowing of the fuse F The circuit is well suited for programmable logic device (PLDs), allowing for read voltages as low as 6 volts, and allowing for programming voltages as high as 40 volts.