The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 22, 2002

Filed:

Dec. 22, 2000
Applicant:
Inventors:

Shinji Toyoyama, Sakurai, JP;

Yuichi Sato, Mie-ken, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F 3/02 ;
U.S. Cl.
CPC ...
G05F 3/02 ;
Abstract

A select circuit switches a connection from a gate terminal of an NMOS transistor or a substrate voltage terminal to a semiconductor substrate or well by a Select signal. At this time, a voltage of the substrate voltage terminal is set to be lower than a gate voltage in an OFF state. Consequently, when the semiconductor substrate or well is connected to the gate terminal in an active state, the off-current can be reduced to 10 A/&mgr;m. When the substrate voltage terminal is connected to the semiconductor substrate or well in a standby state, the off-current can be further reduced to 10 A/&mgr;m. Thus, leakage currents in the standby state and leakage currents flowing from the power supply voltage terminal to the ground voltage terminal in an active state can be suppressed.


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