The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 22, 2002

Filed:

Aug. 29, 2001
Applicant:
Inventor:

Myoung-Soo Kim, Suwon, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/18238 ; H01L 2/18234 ; H01L 2/176 ;
U.S. Cl.
CPC ...
H01L 2/18238 ; H01L 2/18234 ; H01L 2/176 ;
Abstract

A method of fabricating a semiconductor device applies a LOCOS profile characteristic to an edge portion of an STI in a HV region to thereby lower compressive stress that is concentrated on the side of the STI. A field oxide film is formed so that only edge portions of HV region (active region II) may be in contact with a comparatively stiff STI, and then, a thick gate oxide film is formed on the HV region by utilizing a nitride film as a mask. After the nitride film as a mask is removed, a thin gate oxide film is formed on a LV region (an active region I in which a thin gate oxide film is formed). As a result, a thinning phenomenon of a gate oxide film at an edge portion of STI is prevented that otherwise would occur when the gate oxide film for HV grows in a normal STI structure by utilizing a nitride film as a mask. The present invention also prevents compromise of the operational characteristics of a resulting transistor, which otherwise would be caused by the concentration of electric field and by the hump phenomenon.


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