The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 15, 2002
Filed:
May. 18, 2001
Applicant:
Inventor:
Miki Yanagawa, Kawasaki, JP;
Assignee:
Fujitsu Limited, Kawasaki, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 ;
U.S. Cl.
CPC ...
G11C 7/00 ;
Abstract
A memory controller for controlling a memory that is connected thereto and outputs data of a double data rate together with a strobe signal includes a clock signal generation circuit which generates a clock signal supplied to the memory, and a data acquisition circuit which delays the strobe signal through feedback control that makes a delay substantially equal to a ¼ cycle of the clock signal, and which latches the data in response to a timing signal that is the delayed strobe signal.
Yanagawa, Miki. (2002). Memory system and memory controller with reliable data latch operation (U.S. Patent No. 6466491). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6466491
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile