The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 15, 2002

Filed:

Mar. 05, 1999
Applicant:
Inventors:

Joseph F. Cesana, Palo Alto, CA (US);

Peter Trajmar, San Jose, CA (US);

Edward Wang, San Jose, CA (US);

Hank Guo, Cupertino, CA (US);

Steve Chiou, Saratoga, CA (US);

Bruce K. Holmer, Belmont, CA (US);

David Auld, San Jose, CA (US);

Assignee:

Teralogic, Inc., Mountain View, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/300 ;
U.S. Cl.
CPC ...
G06F 1/300 ;
Abstract

A method and apparatus for display of graphical data is described. The invention provides an architecture for graphics processing. The architecture includes pipelined processing and support for multi-regional graphics. In one embodiment, a graphics driver according to the invention can receive multiple independent streams of graphical data that can be in different graphical formats. The independent streams are synchronized and converted to a common format prior to being processed. In one embodiment, multi-regional graphics are supported with off-screen and on-screen memory regions for processing. The regions of the multi-regional graphic are rendered in an off-screen memory. The data in the off-screen memory are converted to a common format and copied to on-screen memory. The data in the on-screen memory is used to generate an output image. Alpha blending can also be programmed to provide multi-regional graphics or other graphical features. In one embodiment, graphics processing is programmable and can be paced using a set of registers.


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