The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 08, 2002
Filed:
Feb. 28, 2001
James C. Dunphy, San Jose, CA (US);
Ronald L. Hansen, San Jose, CA (US);
Brian E. Lindberg, San Jose, CA (US);
Jerome M. Truppa, San Jose, CA (US);
Donald J. Elloway, Campbell, CA (US);
Duke K. Amaniampong, Campbell, CA (US);
Candescent Intellectual Property Services, San Jose, CA (US);
Abstract
A circuit and method for turning-on and turning-off elements of an field emission display (FED) device to protect against emitter electrode and gate electrode degradation. The circuit includes control logic having a sequencer which in one embodiment can be realized using a state machine. Upon power-on, the control logic sends an enable signal to a high voltage power supply that supplies voltage to the anode electrode. At this time a low voltage power supply and driving circuitry are disabled. Upon receiving a confirmation signal from the high voltage power supply, the control logic enables the low voltage power supply which supplies voltage to the driving circuitry. Upon receiving a confirmation signal from the low voltage power supply, or optionally after expiration of a predetermined time period, the control logic then enables the driving circuitry which drives the gate electrodes and the emitter electrodes which make up the rows and columns of the FED device. Upon power down, the control logic first disables the low voltage power supply, then the high voltage power supply. The above may occur upon each time the FED is powered-on and powered-off during the normal operational use of the display. By so doing, embodiments of the present invention reduce emitter electrode and gate electrode degradation by restricting electron emission from the emitter electrode directly to the gate electrode.