The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 01, 2002
Filed:
Feb. 09, 2001
Nagamasa Mizushima, Fujisawa, JP;
Kunihiro Katayama, Chigasaki, JP;
Kazunori Furusawa, Koganei, JP;
Tomihisa Hatano, Yokohama, JP;
Takayuki Tamura, Higashiyamato, JP;
Hitachi, Ltd., Tokyo, JP;
Abstract
In the present invention, disclosed is a semiconductor memory device capable of reducing the number of erasing times of each block allocated to a cluster or the number of blocks to be erased in one writing to the minimum. As an embodiment of the present invention, when a host system performs accessing, for each cluster as a unit, to the FAT partition prepared on a flash memory of the semiconductor memory device , a CPU adds an address offset value held by address offset storage section to a logical address specified by the host system , whereby a logical address of a head sector of the cluster correspond to a physical address of a head sector of a unit block for erasing/writing data in the flash memory